CY24272 generator equivalent, rambus xdr clock generator.
* Meets Rambus® Extended Data Rate (XDR™) clocking requirements
* 25 ps typical cycle-to-cycle jitter
*
–135 dBc/Hz typical phase noise at 20 .
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Logic Block Diagram
/BYPASS
EN
Bypass MUX
REFCLK,REFCLKB
PLL
EN RegA
EN RegB
EN RegC
CLK0 CLK0B
CLK1 CLK1B
CLK2 CLK2B
EN RegD
CLK3 CLK3B
SCL
SDA.
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