Datasheet4U Logo Datasheet4U.com

CY7C1372CV25 Datasheet

512k X 36/1m X 18 Pipelined Sram With Nobl Architecture

Manufacturer: Cypress (now Infineon)

CY7C1372CV25 Overview

They are designed to support unlimited true back-to-back Read/Write operations with no wait states. The CY7C1370CV25 and CY7C1372CV25 are equipped with the advanced (NoBL) logic required to enable consecutive Read/Write operations with data being transferred on every clock cycle.

CY7C1372CV25 Key Features

  • Pin-patible and functionally equivalent to ZBT™
  • Supports 250-MHz bus operations with zero wait states
  • Available speed grades are 250, 225, 200 and 167 MHz
  • Internally self-timed output buffer control to eliminate the need to use asynchronous OE
  • Fully registered (inputs and outputs) for pipelined operation
  • Byte Write capability
  • Single 2.5V power supply
  • Fast clock-to-output times
  • 2.6 ns (for 250-MHz device)
  • 2.8 ns (for 225-MHz device)

CY7C1372CV25 Distributor