AS7C3364NTF36B sram equivalent, (as7c3364ntf32b / as7c3364ntf36b) 3.3v 64k x 32/36 flowthrough synchronous sram.
* Organization: 65,536 words × 32 or 36 bits
* NTD™architecture for efficient bus operation
* Fast clock to data access: 7.5/8.0/10.0 ns
* Fast OE access .
requiring random access or read-modify-write operations. NTD™ devices use the memory bus more efficiently by introducing.
The AS7C3364NTF32B/36B family is a high performance CMOS 2 Mbit synchronous Static Random Access Memory (SRAM) organized as 65,536 words × 32 or 36 bits and incorporates a LATE Write. This variation of the 2Mb+ synchronous SRAM uses the No Turnaround.
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