AS7C3364NTD32B sram equivalent, (as7c3364ntd32b / as7c3364ntd36b) 3.3v 64k x 32/36 pipelined sram.
* Organization: 65,536 words × 32 or 36 bits
* NTD™ architecture for efficient bus operation
* Fast clock speeds to 200 MHz
* Fast clock to data access: 3.
requiring random access or read-modify-write operations.
www.DataSheet4U.com pipeline
NTD™ devices use the memory bus m.
The AS7C3364NTD36B family is a high performance CMOS 2 Mbit synchronous Static Random Access Memory (SRAM) organized as 65,536 words × 32 or 36 bits and incorporates a LATE LATE Write. This variation of the 2Mb sychronous SRAM uses the No Turnaround .
Image gallery
TAGS
Download