AS7C33512NTD18A sram equivalent, 3.3v 512k x 18 pipelined burst synchronous sram.
* Organization: 524,288 words × 18 bits
* NTD™ architecture for efficient bus operation
* Fast clock speeds to 166 MHz
* Fast clock to data access: 3.5/4..
requiring random access or read-modify-write operations. NTD™ devices use www.DataSheet4U.com the memory bus more effici.
The AS7C33512NTD18A family is a high performance CMOS 8 Mbit synchronous Static Random Access Memory (SRAM) organized as 524,288 words × 18 bits and incorporates a LATE LATE Write. This variation of the 8Mb sychronous SRAM uses the No Turnaround Dela.
Image gallery
TAGS
Manufacturer
Related datasheet
Download (Size : 484.77KB)