AS7C33128NTD18B
AS7C33128NTD18B is 3.3V 128Kx18 Pipelined SRAM manufactured by Alliance Semiconductor Corporation.
April 2005
®
3.3V 128K×18 Pipelined SRAM with NTDTM
Features
- Organization: 131,072 words × 18 bits
- NTD™ architecture for efficient bus operation
- Fast clock speeds to 200 MHz
- Fast clock to data access: 3.0/3.5/4.0 ns
- Fast OE access time: 3.0/3.5/4.0 ns
- Fully synchronous operation
- Asynchronous output enable control
- Available in 100-pin TQFP package ..
- Byte write enables
- Clock enable for operation hold Logic block diagram
A[16:0] 17
- Multiple chip enables for easy expansion
- 3.3V core power supply
- 2.5V or 3.3V I/O operation with separate VDDQ
- Self-timed write cycles
- Interleaved or linear burst modes
- Snooze mode for standby operation
Address register Burst logic
17 17 Write delay addr. registers
CLK D Q
CE0 CE1 CE2 R/W BWa BWb ADV / LD LBO ZZ DQ [a:b] 18
Control logic
Write Buffer
128K x 18 SRAM Array
Data Q Input Register
18 CLK...
