* 3.3 V to 5 V logic supply range Power on reset (POR) To 10 MHz data input rate CMOS, TTL compatible
  –40°C operation available
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include driving multiplexed LED displays or incandescent lamps. The A6821 has an eight-bit CMOS shift register and CMOS .

Data Active Time Before Clock Pulse (Data Set-Up Time) Data Active Time After Clock Pulse (Data Hold Time) Clock Pulse Width Time Between Clock Activation and Strobe Strobe Pulse Width Symbol tsu(D) th(D) tw(CH) tsu(C) tw(STH) Time (ns) 25 25 50 10.

682-1

682-2

682-3

682-4

682-5

682-6

68-0102-20-H

68-0105-20-H

680-1

680-2

680-3

680-4

680-5

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