TSPC603R
Description
The PID7t-603e implementation of the PowerPC 603e (renamed after the 603R) is a low-power implementation of the Reduced Instruction Set puter (RISC) microprocessor PowerPC family.
Key Features
- PD Typically = 3.5W (266 MHz), Full Operating Conditions
- Branch Folding
- 64-bit Data Bus (32-bit Data Bus Option)
- 4-Gbytes Direct Addressing Range
- Pipelined Single/Double Precision Float Unit
- fINT Max = 300 MHz
- fBUS Max = 75 MHz
- PD Typically = 2.5W (200 MHz), Full Operating Conditions
