TSPC740A
DESCRIPTION
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The TSPC750A and TSPC740A microprocessor (after named 750A/740A) are low- power implementations of the Power PC Reduced Instruction Set puter (RISC) architecture. The 750A/740A microprocessors designs are superscalar, capable of issuing three instructions per clock cycle into six independent execution units The 740A/750A microprocessors uses a 2,6/3,3- volts CMOS process technology and maintains full interface patibility with TTL devices. The 750A/740A provides four software controlable power- saving modes and a thermal assist unit management.
The 750A/740A microprocessors have separate 32- Kbyte, physically- addressed instruction and data caches and differ only in that the 750A features a dedicated L2 cache interface with on- chip L2 tags. Both are software and bus- patible with the Power PC603 and Power PC604 families, and are fully JTAG pliant.
The TSPC740A microprocessor is pin patible with the TSPC603e family.
G suffix
CBGA255 and CBGA360
Ceramic Ball Grid Array
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