ODCSXXxx is a family of 4 to 24 mA, non-inverting, CMOS-level, output buffer pieces with controlled slew rate outputs. Logic Symbol Truth Table ODCSXXxx SL A PADM A PADM LL HH HDL Syntax Verilog ODCSXXxx inst_name (PADM, A); VHDL inst_name: ODCSXXxx port map (PADM, A); Pin Loading Pin Name A.
