IID6 array equivalent, cmos gate array.
IIDx is a family of non-inverting clock drivers with a single output.
Logic Symbol
Truth Table
IIDx AQ
AQ
AQ LL HH
HDL Syntax Verilog IIDx inst_name (Q, A); VHDL.. inst_name: IIDx port map (Q, A);
Pin Loading Pin Name A
IID1 1.0
Equivalent L.
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