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STMicroelectronics Electronic Components Datasheet

74192 Datasheet

SYNCHRONOUS UP/DOWN DECADE(/BINARY) COUNTER

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74192 pdf
M54/M74HC192
M54/M74HC193
HC192 - SYNCHRONOUS UP/DOWN DECADE COUNTER
HC193 - SYNCHRONOUS UP/DOWN BINARY COUNTER
. HIGH SPEED
fMAX = 54 MHz (TYP.) AT VCC = 5 V
. LOW POWER DISSIPATION
ICC = 4 µA (MAX.) AT TA = 25 °C
. HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
. OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
|IOH| = IOL = 4 mA (MIN.)
. BALANCED PROPAGATION DELAYS
tPLH = tPHL
. WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V TO 6 V
. PIN AND FUNCTION COMPATIBLE WITH
54/74LS192-193
DESCRIPTION
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M54HCXXXF1R M74HCXXXM1R
M74HCXXXB1R M74HCXXXC1R
The M54/74HC192/193 are ahigh speed CMOSSYN-
CHRONOUS UP/DOWN DECADE COUNTERS fab-
ricated in silicon gate C2MOS technology. They have
the same high speed performance of LSTTL combined
with true CMOS low power consumption. The counter
has two separate clock inputs, an UP COUNT input
and a DOWN COUNT input. All outputs of the flip-flop
are simultaneously triggered on the low to high transi-
tion of either clock while the other input isheld high. The
direction of counting is determined by which input is
clocked. This counter may be preset by entering the
desired data on the DATA A, DATA B, DATA C, and
DATA D input. When the LOAD input is taken low the
data is loaded independently of either clock input. This
feature allows the counters to be used as divide-by-n
counters by modifying the count length with the preset
inputs. In addition the counter can also be cleared. This
is accomplished by inputting a high on the CLEAR
input. All 4 internal stages are set to low independently
of either COUNT input. Both a BORROW and CARRY
output are provided to enable cascading of both up and
down counting functions. The BORROW output pro-
duces a negative going pulse when the counter under-
flows and the CARRY outputs a pulse when the
counter overflows. The counter can be cascaded by
connecting the CARRY and BORROW outputs of one
device to the COUNT UP and COUNT DOWN inputs,
respectively, of the next device. All inputs are equipped
with protection circuits against static discharge and
transient excess voltage.
PIN CONNECTIONS (top view)
NC =
No Internal
Connection
October 1992
1/15


STMicroelectronics Electronic Components Datasheet

74192 Datasheet

SYNCHRONOUS UP/DOWN DECADE(/BINARY) COUNTER

No Preview Available !

74192 pdf
M54/M74HC192/193
INPUT AND OUTPUT EQUIVALENT CIRCUIT
IEC LOGIC SYMBOL (HC191)
PIN DESCRIPTION
PIN No
3, 2, 6, 7
4
5
11
12
13
14
15, 1, 10, 9
8
16
SYMBOL
QA to QD
CPD
CPU
LOAD
CARRY
BORROW
CLEAR
DA to DD
GND
VCC
NAME AND FUNCTION
Flip-Flop Outputs
Count Down Clock Input
Count Up Clock Input
Asynchronous Parallel
Load Input (Active LOW)
Count Up (Carry)
Output (Active LOW)
Count Down (Borrow)
Output (Active LOW)
Asynchronous Reset
Input (Active HIGH)
Data Inputs
Ground (0V)
Positive Supply Voltage
IEC LOGIC SYMBOL (HC193)
TRUTH TABLE
COUNT UP
H
H
X
X
X: Don’t Care
COUNT DOWN
H
H
X
X
LOAD
H
H
H
H
L
X
CLEAR
L
L
L
L
L
H
FUNCTION
COUNT UP
NO COUNT
COUNT DOWN
NO COUNT
PRESET
RESET
2/15


Part Number 74192
Description SYNCHRONOUS UP/DOWN DECADE(/BINARY) COUNTER
Manufacturer STMicroelectronics
Total Page 15 Pages
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