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Cypress Semiconductor Electronic Components Datasheet

CY8CTMG120 Datasheet

Multi-Touch All-Point Touchscreen Controller

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CY8CTMG120
TrueTouch™ Multi-Touch Gesture
Touchscreen Controller
Features
TrueTouchCapacitive Touchscreen Controller
Supports Single-Touch and Multi-Touch Touchscreen Control
Supports up to 44 X/Y Sensor Inputs
Supports Screen Sizes 8.4” and Below
Fast Scan Rates: Typical 0.5 ms per Sensor
High Resolution: Typical 480 x 360 for 3.5” Screen
Available in 56-Pin QFN Package
Seamless Transition up to Higher Function Multi-Touch
All-Point Device
Lowest Noise TrueTouch Device
Highly Configurable Sensing Circuitry
Allows Maximum Design Flexibility
Allows Trade-Off Between Scan Time and Noise Perfor-
mance
Includes Gesture Detection Library
Develop Customized User Defined Gestures
Provides Maximum EMI Immunity
Selectable Spread-Spectrum Clock Source
Powerful Harvard Architecture Processor
M8C Processor Speeds to 24 MHz
Two 8x8 Multiply, 32-Bit Accumulate
Low Power at High Speed
3V to 5.25V Operating Voltage
Industrial Temperature Range: –40°C to +85°C
USB Temperature Range: –10°C to +85°C
Full-Speed USB (12 Mbps)
Four Uni-Directional Endpoints
One Bi-Directional Control Endpoint
USB 2.0 Compliant
Dedicated 256 Byte Buffer
No External Crystal Required
Flexible On-Chip Memory
16K Flash Program Storage, 50000 Erase/Write Cycles
1K SRAM Data Storage
In-System Serial Programming (ISSP)
Partial Flash Updates
Flexible Protection Modes
EEPROM Emulation in Flash
Precision, Programmable Clocking
Internal ±4% 24 and 48 MHz Oscillator
Internal Oscillator for Watchdog and Sleep
0.25% Accuracy for USB with no External Components
Additional System Resources
I2CSlave, Master, and Multi-Master to 400 kHz
Watchdog and Sleep Timers
User-Configurable Low Voltage Detection
Integrated Supervisory Circuit
On-Chip Precision Voltage Reference
Complete Development Tools
Free Development Software (PSoC Designer™)
TrueTouch Touchscreen Tuner
Full-Featured, In-Circuit Emulator and Programmer
Full Speed Emulation
Complex Breakpoint Structure
128K Bytes Trace Memory
Programmable Pin Configurations
25 mA Sink, 10 mA Drive on All GPIO
Pull Up, Pull Down, High Z, Strong, or Open Drain Drive
Modes on All GPIO
Configurable Interrupt on All GPIO
Logic Block Diagram
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-46929 Rev. *B
• San Jose, CA 95134-1709 • 408-943-2600
Revised July 29, 2008
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Cypress Semiconductor Electronic Components Datasheet

CY8CTMG120 Datasheet

Multi-Touch All-Point Touchscreen Controller

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CY8CTMG120 pdf
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CY8CTMG120
TrueTouch Functional Overview
The TrueTouch family provides the fastest and most efficient way
to develop and tune a capacitive touchscreen application. A
TrueTouch device includes the configurable TrueTouch block,
configurable analog and digital logic, programmable inter-
connect, and an 8-bit CPU to run custom firmware. This archi-
tecture enables the user to create flexible, customized touch-
screen configurations to match the requirements of each
individual touchscreen application. Various configurations of
Flash program memory, SRAM data memory, and configurable
IO are included in a range of convenient pinouts.
The TrueTouch architecture is comprised of four main areas: the
Core, Digital System, the TrueTouch Analog System, and
System Resources including a full-speed USB port. Configurable
global busing allows all the device resources to be combined into
a complete custom touchscreen system. The CY8CTMG120
device can have up to seven IO ports that connect to the global
digital and analog interconnects, providing access to four digital
blocks and six analog blocks. Implementation of touchscreen
application allows additional digital and analog resources to be
used, depending on the touchscreen design. The CY8CTMG120
is offered in a 56-pin QFN package, with up to 48 general
purpose IO (GPIO), and support of up to 44 X/Y sensors.
When designing touchscreen applications, refer to the UM data
sheet for performance requirements to meet and detailed design
process explanation.
The TrueTouch Core
The core includes a CPU, memory, clocks, and configurable
GPIO (General Purpose IO).
The M8C CPU core is a powerful processor with speeds up to 24
MHz, providing a four MIPS 8-bit Harvard architecture micropro-
cessor. The CPU uses an interrupt controller with up to 20
vectors, to simplify programming of real time embedded events.
Program execution is timed and protected using the included
Sleep and Watch Dog Timers (WDT).
Memory encompasses 16K of Flash for program storage, 1K of
SRAM for data storage, and up to 2K of EEPROM emulated
using the Flash. Program Flash uses four protection levels on
blocks of 64 bytes, allowing customized software IP protection.
The TrueTouch device incorporates flexible internal clock gener-
ators, including a 24 MHz IMO (internal main oscillator) accurate
to 8% over temperature and voltage. The 24 MHz IMO can also
be doubled to 48 MHz for use by the digital system. A low power
32 kHz ILO (internal low speed oscillator) is provided for the
Sleep timer and WDT. The clocks, together with programmable
clock dividers (as a System Resource), provide the flexibility to
integrate almost any timing requirement into the PSoC device. In
USB systems, the IMO self-tunes to ± 0.25% accuracy for USB
communication.
The GPIOs provide connection to the CPU, digital and analog
resources of the device. Each pin’s drive mode may be selected
from eight options, allowing great flexibility in external inter-
facing. Every pin also has the capability to generate a system
interrupt on high level, low level, and change from last read.
The Digital System
The Digital System is composed of 4 digital PSoC blocks. Each
block is an 8-bit resource that can be used alone or combined
with other blocks to form 8, 16, 24, and 32-bit peripherals, which
are called user module references.
Figure 1. Digital System Block Diagram
Port 7
Port 5
Port 4
Port 3
Port 2
Port 1
Port 0
DigitalClocks To SystemBus ToAnalog
FromCore
System
8
8
DIGITAL SYSTEM
Digital PSoC Block Array
Row0
4
DBB00 DBB01 DCB02 DCB03
4
8
8
GIE[7:0]
GIO[7:0]
GlobalDigital
Interconnect
GOE[7:0]
GOO[7:0]
Digital peripheral configurations include those listed below.
Full-Speed USB (12 Mbps)
PWMs (8 to 32 bit)
PWMs with dead band (8 to 24 bit)
Counters (8 to 32 bit)
Timers (8 to 32 bit)
UART 8 bit with selectable parity
SPI master and slave
I2C slave and multi-master
Pseudo random sequence generators (8 to 32 bit)
The digital blocks are connected to any GPIO through a series
of global buses that can route any signal to any pin. The buses
also allow signal multiplexing and performing logic operations.
This configurability frees your designs from the constraints of a
fixed peripheral controller.
Digital blocks are provided in rows of four, where the number of
blocks varies by TrueTouch device family. This allows optimum
choice of system resources for your application. Family charac-
teristics are shown in Table 1 on page 4.
Document Number: 001-46929 Rev. *B
Page 2 of 33
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Part Number CY8CTMG120
Description Multi-Touch All-Point Touchscreen Controller
Maker Cypress Semiconductor
Total Page 30 Pages
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