| No |
Part Number |
Description |
Manufacture |
PDF |
| 50 |
74LVX00 |
Low Voltage Quad 2-Input NAND Gate
74LVX00 Low Voltage Quad 2-Input NAND Gate
February 1993 Revised March 1999
74LVX00 Low Voltage Quad 2-Input NAND Gate
General Description
The LVX00 contains four 2-input NAND gates. The inputs tole |
Fairchild Semiconductor
|
|
| 49 |
74LVX00 |
LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE
74LVX00
LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE WITH 5V TOLERANT INPUTS
s HIGH SPEED:
tPD = 4.1ns (TYP.) at VCC = 3.3V s 5V TOLERANT INPUTS
s INPUT VOLTAGE LEVEL:
VIL=0.8V, VIH=2V at VCC=3V
)s LOW |
STMicroelectronics
|
|
| 48 |
74LVX02 |
Low Voltage Quad 2-Input NOR Gate
74LVX02 Low Voltage Quad 2-Input NOR Gate
May 1993 Revised March 1999
74LVX02 Low Voltage Quad 2-Input NOR Gate
General Description
The LVX02 contains four 2-input NOR gates. The inputs tolerate vol |
Fairchild Semiconductor
|
|
| 47 |
74LVX04 |
Low Voltage Hex Inverter
74LVX04 Low Voltage Hex Inverter
May 1993 Revised March 1999
74LVX04 Low Voltage Hex Inverter
General Description
The LVX04 contains six inverters. The inputs tolerate voltages up to 7V allowing the |
Fairchild Semiconductor
|
|
| 46 |
74LVX05 |
LOW VOLTAGE CMOS HEX INVERTER (OPEN DRAIN) WITH 5V TOLERANT INPUTS
74LVX05
LOW VOLTAGE CMOS HEX INVERTER (OPEN DRAIN) WITH 5V TOLERANT INPUTS
s
s s
s
s
s
s
s s
HIGH SPEED: tPD = 4.8ns (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS INPUT VOLTAGE LEVEL: VIL=0.8V, VIH=2 |
STMicroelectronics
|
|
| 45 |
74LVX08 |
Low Voltage Quad 2-Input AND Gate
74LVX08 — Low Voltage Quad 2-Input AND Gate
June 2014
74LVX08 Low Voltage Quad 2-Input AND Gate
Features
• Input Voltage Level Translation from 5 V to 3 V • Ideal for Low-power / Low-Noise 3. |
Fairchild Semiconductor
|
|
| 44 |
74LVX08 |
LOW VOLTAGE CMOS QUAD 2-INPUT AND GATE
74LVX08
LOW VOLTAGE CMOS QUAD 2-INPUT AND GATE WITH 5V TOLERANT INPUTS
s HIGH SPEED : tPD = 4.8ns (TYP.) at VCC = 3.3V
s 5V TOLERANT INPUTS
s INPUT VOLTAGE LEVEL : VIL=0.8V, VIH=2V AT VCC=3V
s LOW PO |
STMicroelectronics
|
|
| 43 |
74LVX112 |
Low Voltage Dual J-K Flip-Flops with Preset and Clear
74LVX112 Low Voltage Dual J-K Flip-Flops with Preset and Clear
October 1996 Revised March 1999
74LVX112 Low Voltage Dual J-K Flip-Flops with Preset and Clear
General Description
The LVX112 is a dual |
Fairchild Semiconductor
|
|
| 42 |
74LVX125 |
Low Voltage Quad Buffer with 3-STATE Outputs
74LVX125 — Low Voltage Quad Buffer with 3-STATE Outputs
February 2008
74LVX125 Low Voltage Quad Buffer with 3-STATE Outputs
Features
■ Input voltage level translation from 5V to 3V ■ Ideal fo |
Fairchild Semiconductor
|
|
| 41 |
74LVX125 |
LOW VOLTAGE QUAD BUS BUFFERS (3-STATE) WITH 5V TOLERANT INPUTS
74LVX125
LOW VOLTAGE QUAD BUS BUFFERS (3-STATE) WITH 5V TOLERANT INPUTS
s s s s
HIGH SPEED: tPD=4.4ns (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS POWER-DOWN PROTECTION ON INPUTS INPUT VOLTAGE LEVEL: VIL |
STMicroelectronics
|
|
| 40 |
74LVX125 |
Low-Voltage Quad Buffer
74LVX125 Low-Voltage Quad Buffer with TRI-STATE Outputs
January 1996
74LVX125 Low-Voltage Quad Buffer with TRI-STATE Outputs
General Description
The LVX125 contains four independent non-inverting b |
National Semiconductor
|
|
| 39 |
74LVX132 |
Low Voltage Quad 2-Input NAND Schmitt Trigger
74LVX132 Low Voltage Quad 2-Input NAND Schmitt Trigger
October 1996 Revised March 1999
74LVX132 Low Voltage Quad 2-Input NAND Schmitt Trigger
General Description
The LVX132 contains four 2-input NAN |
Fairchild Semiconductor
|
|
