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HEF4060BT - 14-stage ripple-carry binary counter/divider and oscillator

Download the HEF4060BT datasheet PDF. This datasheet also covers the HEF4060B variant, as both devices belong to the same 14-stage ripple-carry binary counter/divider and oscillator family and are provided as variant models within a single manufacturer datasheet.

Description

The HEF4060B is a 14-stage ripple-carry binary counter/divider and oscillator with three oscillator terminals (RS, REXT and CEXT), ten buffered outputs (Q3 to Q9 and Q11 to Q13) and an overriding asynchronous master reset input (MR).

Features

  • Tolerant of slow clock rise and fall times.
  • Fully static operation.
  • 5 V, 10 V, and 15 V parametric ratings.
  • Standardized symmetrical output characteristics.
  • Inputs and outputs are protected against electrostatic effects.
  • Specified from -40 ° C to +85 ° C.
  • Complies with JEDEC standard JESD 13-B 3. Ordering information Table 1. Ordering information All types operate from -40 ° C to +85 ° C. Type number Package Name.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (HEF4060B-nexperia.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number HEF4060BT
Manufacturer nexperia
File Size 233.31 KB
Description 14-stage ripple-carry binary counter/divider and oscillator
Datasheet download datasheet HEF4060BT Datasheet

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Other Datasheets by nexperia

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Full PDF Text Transcription

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HEF4060B 14-stage ripple-carry binary counter/divider and oscillator Rev. 9 — 8 July 2019 Product data sheet 1. General description The HEF4060B is a 14-stage ripple-carry binary counter/divider and oscillator with three oscillator terminals (RS, REXT and CEXT), ten buffered outputs (Q3 to Q9 and Q11 to Q13) and an overriding asynchronous master reset input (MR). The oscillator configuration allows design of either RC or crystal oscillator circuits. The oscillator may be replaced by an external clock signal at input RS. The clock input' s Schmitt-trigger action makes it highly tolerant to slower clock rise and fall times. The counter advances on the negativegoing transition of RS.
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