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74AVC4T3144-Q100 - 4-bit dual-supply buffer/level translator

General Description

The 74AVC4T3144-Q100 is a 4-bit, dual-supply level translating buffer with 3-state outputs.

Key Features

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1).
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C.
  • Wide supply voltage range:.
  • VCC(A): 0.8 V to 3.6 V.
  • VCC(B): 0.8 V to 3.6 V.
  • Complies with JEDEC standards:.
  • JESD8-12 (0.8 V to 1.3 V).
  • JESD8-11 (0.9 V to 1.65 V).
  • JESD8-7 (1.2 V to 1.95 V).
  • JESD8-5 (1.8 V to 2.7 V).
  • JESD8-B (2.7 V to 3.6 V).
  • ESD protection:.

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Full PDF Text Transcription for 74AVC4T3144-Q100 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for 74AVC4T3144-Q100. For precise diagrams, and layout, please refer to the original PDF.

74AVC4T3144-Q100 4-bit dual-supply buffer/level translator; 3-state Rev. 1 — 15 November 2019 Product data sheet 1. General description The 74AVC4T3144-Q100 is a 4-bit, d...

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t data sheet 1. General description The 74AVC4T3144-Q100 is a 4-bit, dual-supply level translating buffer with 3-state outputs. It features four data inputs (An and B4), four data outputs (YBn and YA4), and an output enable input (OE). The device is configured to translate three inputs from VCC(A) to VCC(B) and one input from VCC(B) to VCC(A). OE, An and YA4 are referenced to VCC(A) and YBn and B4 are referenced to VCC(B). A HIGH on OE causes the outputs to assume a high-impedance OFF-state. The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables outputs, preventing any dam