Download the 74AHC04BQ datasheet PDF.
This datasheet also covers the 74AHC04 variant, as both devices belong to the same hex inverter family and are provided as variant models within a single manufacturer datasheet.
General Description
The 74AHC04; 74AHCT04 is a high-speed Si-gate CMOS device and is pin compatible with Lowpower Schottky TTL (LSTTL).
It is specified in compliance with JEDEC standard No.
7-A.
Key Features
Balanced propagation delays.
Inputs accept voltages higher than VCC.
Input levels:.
For 74AHC04: CMOS level.
For 74AHCT04: TTL level.
ESD protection:.
HBM JESD22-A114F exceeds 2000 V.
MM JESD22-A115-A exceeds 200 V.
CDM JESD22-C101C exceeds 1000 V.
Multiple package options.
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
3. Ordering information
Table 1. Ordering information
Type numb.
Full PDF Text Transcription for 74AHC04BQ (Reference)
Note: Below is a high-fidelity text extraction (approx. 800 characters) for
74AHC04BQ. For precise diagrams, and layout, please refer to the original PDF.
74AHC04; 74AHCT04 Hex inverter Rev. 7 — 10 September 2020 Product data sheet 1. General description The 74AHC04; 74AHCT04 is a high-speed Si-gate CMOS device and is pin c...
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The 74AHC04; 74AHCT04 is a high-speed Si-gate CMOS device and is pin compatible with Lowpower Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC04; 74AHCT04 provides six inverting buffers. 2. Features and benefits • Balanced propagation delays • Inputs accept voltages higher than VCC • Input levels: • For 74AHC04: CMOS level • For 74AHCT04: TTL level • ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V • CDM JESD22-C101C exceeds 1000 V • Multiple package options • Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3. Ordering information Table
74AHC04BQ Datasheet
