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74ABT32D - Quad 2-input OR gate

Download the 74ABT32D datasheet PDF. This datasheet also covers the 74ABT32 variant, as both devices belong to the same quad 2-input or gate family and are provided as variant models within a single manufacturer datasheet.

Description

The 74ABT32 is a quad 2-input OR gate.

This device is fully specified for partial power down applications using IOFF.

The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features

  • Supply voltage range from 4.5 V to 5.5 V.
  • BiCMOS high speed and output drive.
  • Direct interface with TTL levels.
  • IOFF circuitry provides partial Power-down mode operation.
  • Latch-up protection exceeds 500 mA per JESD78B class II level A.
  • ESD protection:.
  • HBM JESD22-A114F exceeds 2000 V.
  • MM JESD22-A115-A exceeds 200 V.
  • Specified from -40 °C to +85 °C 3. Ordering information Table 1. Ordering information Type number.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (74ABT32-nexperia.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription

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74ABT32 Quad 2-input OR gate Rev. 4 — 9 October 2020 Product data sheet 1. General description The 74ABT32 is a quad 2-input OR gate. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • Supply voltage range from 4.5 V to 5.5 V • BiCMOS high speed and output drive • Direct interface with TTL levels • IOFF circuitry provides partial Power-down mode operation • Latch-up protection exceeds 500 mA per JESD78B class II level A • ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V • Specified from -40 °C to +85 °C 3. Ordering information Table 1.
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