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TPS51206 Datasheet 2-A Peak Sink / Source DDR Termination Regulator

Manufacturer: Texas Instruments

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General Description

The TPS51206 device is a sink and source double date rate (DDR) termination regulator with VTTREF buffered reference output.

It is specifically designed for low-input voltage, low-cost, low-external component count systems where space is a key consideration.

The device maintains fast transient response and only requires 1 × 10-µF of ceramic output capacitance.

Overview

Product Folder Order Now Technical Documents Tools & Software Support & Community TPS51206 SLUSAH1E – MAY 2011 – REVISED JULY 2018 TPS51206 2-A Peak Sink / Source DDR Termination Regulator With VTTREF Buffered Reference.

Key Features

  • 1 Supply Input Voltage: Supports 3.3-V Rail and 5-V Rail.
  • VLDOIN Input Voltage Range: VTT+0.4 V to 3.5 V.
  • VTT Termination Regulator.
  • Output Voltage Range: 0.5 V to 0.9 V.
  • 2-A Peak Sink and Source Current.
  • Requires Only 10-μF MLCC Output Capacitor.
  • ±20 mV Accuracy.
  • VTTREF Buffered Reference.
  • VDDQ/2 ± 1% Accuracy.
  • 10-mA Sink and Source Current.
  • Supports High-Z in S3 and Soft-Stop in S4 and S5 with S3.

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