TPA5051
FEATURES
- Digital Audio Format: 16-24-bit I2S, Right-Justified, Left-Justified
- I2C Bus Controlled
- Dual Serial Input Ports
- Delay Time: 85 ms/ch at fs = 48 k Hz
- Delay Resolution: One Sample
- Delay Memory Cleared on Power-Up or After
Delay Changes
- Eliminates Erroneous Data on Output
- 3.3 V Operation With 5 V Tolerant I/O and I2C Control
- Supports Audio Bit Clock Rates of 32 to 64 fs with fs = 32 k Hz- 192 k Hz
- No External Crystal or Oscillator Required
- All Internal Clocks Generated From the
Audio Clock
- Independent Clocks for Each Audio Input
- Surface Mount 4mm × 4mm, 16-pin QFN
Package
SIMPLIFIED APPLICATION DIAGRAM
Audio Processor
APPLICATIONS
- High Definition Lip-Sync Delay
- Flat Panel TV Lip-Sync Delay
- Home Theater Rear Channel Effects
- Wireless Speaker Front-Channel
Synchronization
DESCRIPTION
The TPA5051 accepts two serial audio inputs, buffers the data for a selectable period of time, and outputs the delayed audio data on two serial outputs. One device allows...
