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SNJ54LVC00AFK - Quadruple 2-Input Positive-NAND Gate

Download the SNJ54LVC00AFK datasheet PDF. This datasheet also covers the SNJ54LVC00AJ variant, as both devices belong to the same quadruple 2-input positive-nand gate family and are provided as variant models within a single manufacturer datasheet.

Description

The SN54LVC00A quadruple 2-input positive-NAND gate is designed for 2.7-V to 3.6-V VCC operation, and the SN74LVC00A quadruple 2-input positive-NAND gate is designed for 1.65-V to 3.6-V VCC operation.

The SNx4LVC00A devices perform the Boolean function Y = A × B or Y = A + B in positive logic.

Features

  • 1 Operate From 1.65 V to 3.6 V.
  • Specified From.
  • 40°C to 85°C,.
  • 40°C to 125°C, and.
  • 55°C to 125°C.
  • Inputs Accept Voltages to 5.5 V.
  • Max tpd of 4.3 ns at 3.3 V.
  • Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C.
  • Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25°C.
  • Latch-Up Performance Exceeds 250 mA Per JESD 17.
  • On Products Compliant to MIL-PRF-38535, All Parameters.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (SNJ54LVC00AJ-etcTI.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription

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Product Folder Sample & Buy Technical Documents Tools & Software Support & Community SN54LVC00A, SN74LVC00A SCAS279R – JANUARY 1993 – REVISED FEBRUARY 2016 SNx4LVC00A Quadruple 2-Input Positive-NAND Gates 1 Features •1 Operate From 1.65 V to 3.6 V • Specified From –40°C to 85°C, –40°C to 125°C, and –55°C to 125°C • Inputs Accept Voltages to 5.5 V • Max tpd of 4.3 ns at 3.3 V • Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C • Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25°C • Latch-Up Performance Exceeds 250 mA Per JESD 17 • On Products Compliant to MIL-PRF-38535, All Parameters Are Tested Unless Otherwise Noted. On All Other Products, Production Processing Does Not Necessarily Include Testing of All Parameters.
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