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SN74LVTH273 - 3.3-V ABT OCTAL D-TYPE FLIP-FLOPS

General Description

These octal D-type flip-flops are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.

The ’LVTH273 devices are positive-edge-triggered flip-flops with a direct-clear input.

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Other Datasheets by Texas Instruments

Part Number Description
SN74LVTH273-EP 3.3-V ABT OCTAL D-TYPE FLIP-FLOPS
SN74LVTH2245 3.3-V ABT OCTAL BUS TRANSCEIVERS
SN74LVTH240 3.3-V ABT OCTAL BUFFERS/DRIVERS
SN74LVTH241 3.3-V ABT OCTAL BUFFERS/DRIVERS
SN74LVTH244A 3.3-V ABT OCTAL BUFFERS/DRIVERS
SN74LVTH244A-EP 3.3-V ABT OCTAL BUFFERS/DRIVERS
SN74LVTH245A 3.3-V ABT OCTAL BUS TRANSCEIVERS
SN74LVTH245A-EP 3.3-V ABT OCTAL BUS TRANSCEIVERS
SN74LVTH2952 3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS
SN74LVTH125 3.3-V ABT QUADRUPLE BUS BUFFER

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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D Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC ) D Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C D Support Unregulated Battery Operation Down To 2.7 V D Buffered Clock and Direct-Clear Inputs D Individual Data Input to Each Flip-Flop SN54LVTH273 . . . J PACKAGE SN74LVTH273 . . . DB, DW, NS, OR PW PACKAGE (TOP VIEW) SN54LVTH273, SN74LVTH273 3.3ĆV ABT OCTAL DĆTYPE FLIPĆFLOPS WITH CLEAR SCBS136M − MAY 1992 − REVISED OCTOBER 2003 D Ioff Supports Partial-Power-Down-Mode Operation D Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors D Latch-Up Performance Exceeds 500 mA Per JESD 17 D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) SN54LVTH273 . . .