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SN74LV8T573 - Octal D-Type Transparent Latches

General Description

Wide operating range of 1.65V to 5.5V 5.5V tolerant input pins Single-supply voltage translator (refer to LVxT Enhanced Input Voltage): Up translation: 1.2V to 1.8V 1.5V to 2.5V 1.8V to 3.3V 3.3V to 5.0V Down

Key Features

  • 3.

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Full PDF Text Transcription (Reference)

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SN74LV8T573 SLVSJZ6 – SEPTEMBER 2025 SN74LV8T573 Octal D-Type Transparent Latches with 3-State Outputs and Integrated Level Translation 1 Features 3 Description • Wide operating range of 1.65V to 5.5V • 5.5V tolerant input pins • Single-supply voltage translator (refer to LVxT Enhanced Input Voltage): – Up translation: • 1.2V to 1.8V • 1.5V to 2.5V • 1.8V to 3.3V • 3.3V to 5.0V – Down translation: • 5.0V, 3.3V, 2.5V to 1.8V • 5.0V, 3.3V to 2.5V • 5.0V to 3.3V • Up to 150Mbps with 5V or 3.3V VCC • Supports standard function pinout • Latch-up performance exceeds 250mA per JESD 17 2 Applications • Parallel data storage • Digital bus buffer The SN74LV8T573 contains eight D-type latches. All channels share a latch enable (LE) input and output enable (OE) input.