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SN74AUP2G80 - LOW-POWER DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

Description

applications.

Features

  • 1.
  • Available in the Texas Instruments NanoStar™ Package.
  • Low Static-Power Consumption (ICC = 0.9 mA Maximum).
  • Low Dynamic-Power Consumption (Cpd = 4.3 pF Typ at 3.3 V).
  • Low Input Capacitance (Ci = 1.5 pF Typical).
  • Low Noise.
  • Overshoot and Undershoot.

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Full PDF Text Transcription

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SN74AUP2G80 www.ti.com SCES756A – DECEMBER 2009 – REVISED MARCH 2010 LOW-POWER DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP Check for Samples: SN74AUP2G80 FEATURES 1 • Available in the Texas Instruments NanoStar™ Package • Low Static-Power Consumption (ICC = 0.9 mA Maximum) • Low Dynamic-Power Consumption (Cpd = 4.3 pF Typ at 3.3 V) • Low Input Capacitance (Ci = 1.5 pF Typical) • Low Noise – Overshoot and Undershoot <10% of VCC • Ioff Supports Partial-Power-Down Mode Operation • Wide Operating VCC Range of 0.8 V to 3.6 V • Optimized for 3.3-V Operation • 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation • tpd = 4.4 ns Maximum at 3.
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