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SN74ALVCH32374 - 32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP

General Description

This 32-bit edge-triggered D-type flip-flop is designed for 1.65-V to 3.6-V VCC operation.

The SN74ALVCH32374 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

Key Features

  • Member of the Texas Instruments Widebus+™ Family.
  • Operates From 1.65 V to 3.6 V.
  • Max tpd of 4.2 ns at 3.3 V.
  • ±24-mA Output Drive at 3.3 V.
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors.
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II.
  • ESD Protection Exceeds JESD 22.
  • 2000-V Human-Body Model (A114-A).
  • 200-V Machine Model (A115-A).
  • 1000-V Charged-Device Model (C.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.ti.com SN74ALVCH32374 32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS SCES283D – OCTOBER 1999 – REVISED AUGUST 2004 FEATURES • Member of the Texas Instruments Widebus+™ Family • Operates From 1.65 V to 3.6 V • Max tpd of 4.2 ns at 3.3 V • ±24-mA Output Drive at 3.3 V • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II • ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) DESCRIPTION/ORDERING INFORMATION This 32-bit edge-triggered D-type flip-flop is designed for 1.65-V to 3.6-V VCC operation.