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SN74ALVCH162721 - 3.3-V 20-BIT FLIP-FLOP

General Description

This 20-bit flip-flop is designed for low-voltage 1.65-V to 3.6-V VCC operation.

The 20 flip-flops of the SN74ALVCH162721 are edge-triggered D-type flip-flops with qualified clock storage.

Key Features

  • Member of the Texas Instruments Widebus™ Family.
  • EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process.
  • Output Ports Have Equivalent 26-Ω Series Resistors, So No External Resistors Are Required.
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0).
  • Latch-Up Performance Exceeds 250 mA Per JESD 17.
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resis.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.ti.com SN74ALVCH162721 3.3-V 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS SCES055G – DECEMBER 1995 – REVISED SEPTEMBER 2004 FEATURES • Member of the Texas Instruments Widebus™ Family • EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process • Output Ports Have Equivalent 26-Ω Series Resistors, So No External Resistors Are Required • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) • Latch-Up Performance Exceeds 250 mA Per JESD 17 • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors • Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages NOTE: For tape-and-reel order entry, the DGGR package is abbreviated to GR.