Datasheet4U Logo Datasheet4U.com

SN74ALVC10 - TRIPLE 3-INPUT POSITIVE-NAND GATE

General Description

This triple 3-input positive-NAND gate is designed for 1.65-V to 3.6-V VCC operation.

B

C or Y = A + B + C in positive logic.

Key Features

  • Operates From 1.65 V to 3.6 V.
  • Max tpd of 3 ns at 3.3 V.
  • ±24-mA Output Drive at 3.3 V.
  • Latch-Up Performance Exceeds 250 mA Per JESD 17.
  • ESD Protection Exceeds JESD 22.
  • 2000-V Human-Body Model (A114-A).
  • 200-V Machine Model (A115-A).
  • 1000-V Charged-Device Model (C101) SN74ALVC10 TRIPLE 3-INPUT.

📥 Download Datasheet

Other Datasheets by Texas Instruments

Part Number Description
SN74ALVC125 QUADRUPLE BUS BUFFER GATE
SN74ALVC126 QUADRUPLE BUS BUFFER GATE
SN74ALVC14 HEX SCHMITT-TRIGGER INVERTER
SN74ALVC162334 16-BIT UNIVERSAL BUS DRIVER
SN74ALVC16244A 16-BIT BUFFER/DRIVER
SN74ALVC162835 18-BIT UNIVERSAL BUS DRIVER
SN74ALVC162836 20-BIT UNIVERSAL BUS DRIVER
SN74ALVC16334 16-BIT UNIVERSAL BUS DRIVER
SN74ALVC164245 Level-Shifting Transceiver
SN74ALVC164245-EP Level-Shifting Transceiver

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.ti.com FEATURES • Operates From 1.65 V to 3.6 V • Max tpd of 3 ns at 3.3 V • ±24-mA Output Drive at 3.3 V • Latch-Up Performance Exceeds 250 mA Per JESD 17 • ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) SN74ALVC10 TRIPLE 3-INPUT POSITIVE-NAND GATE SCES106H – JULY 1997 – REVISED OCTOBER 2004 D, DGV, NS, OR PW PACKAGE (TOP VIEW) 1A 1 1B 2 2A 3 2B 4 2C 5 2Y 6 GND 7 14 VCC 13 1C 12 1Y 11 3C 10 3B 9 3A 8 3Y DESCRIPTION/ORDERING INFORMATION This triple 3-input positive-NAND gate is designed for 1.65-V to 3.6-V VCC operation. The SN74ALVC10 performs the Boolean function Y = A • B • C or Y = A + B + C in positive logic.