Datasheet4U Logo Datasheet4U.com

SN74AHC125D - Quadruple Bus Buffer Gates

Download the SN74AHC125D datasheet PDF. This datasheet also covers the SN74AHC125 variant, as both devices belong to the same quadruple bus buffer gates family and are provided as variant models within a single manufacturer datasheet.

Description

The SNx4AHC125 devices are quadruple bus buffer gates featuring independent line drivers with 3-state outputs.

Each output is disabled when the associated output-enable ( OE) input is high.

When OE is low, the respective gate passes the data from the A input to its Y output.

Features

  • Operating range of 2V to 5.5V.
  • Latch-up performance exceeds 250mA per JESD 17.
  • Four individual output enable pins 2.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (SN74AHC125-etcTI.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
SN74101 AND-OR Gate ETC
SN74102 AND Gate ETC
SN74103 Dual J-K Flip-Flop ETC
SN74106 Dual J-K Flip-Flop ETC
SN74108 Dual J-K Flip Flop ETC

Other Datasheets by Texas Instruments

Part Number Description
SN74AHC125 Quadruple Bus Buffer Gates
SN74AHC125-EP QUADRUPLE BUS BUFFER GATE
SN74AHC125-Q1 QUADRUPLE BUS BUFFER GATE
SN74AHC125N Quadruple Bus Buffer Gates
SN74AHC125Q QUADRUPLE BUS BUFFER GATE

Full PDF Text Transcription

Click to expand full text
SN54AHC125, SN74AHC125 SCLS256O – DECEMBER 1995 – REVISED FEBRUARY 2024 SNx4AHC125 Quadruple Bus Buffer Gates With 3-State Outputs 1 Features • Operating range of 2V to 5.5V • Latch-up performance exceeds 250mA per JESD 17 • Four individual output enable pins 2 Applications • Flow Meters • Programmable Logic Controllers • Power Over Ethernet (PoE) • Motor Drives and Controls • Electronic Point-of-Sale 3 Description The SNx4AHC125 devices are quadruple bus buffer gates featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable ( OE) input is high. When OE is low, the respective gate passes the data from the A input to its Y output.
Published: |