Click to expand full text
D Support Mixed-Mode Signal Operation
(5-V Input and Output Voltages With 3.3-V VCC )
D Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
D Support Unregulated Battery Operation
Down To 2.7 V
D Buffered Clock and Direct-Clear Inputs D Individual Data Input to Each Flip-Flop
SN54LVTH273 . . . J PACKAGE SN74LVTH273 . . . DB, DW, NS, OR PW PACKAGE
(TOP VIEW)
SN54LVTH273, SN74LVTH273 3.3ĆV ABT OCTAL DĆTYPE FLIPĆFLOPS
WITH CLEAR
SCBS136M − MAY 1992 − REVISED OCTOBER 2003
D Ioff Supports Partial-Power-Down-Mode
Operation
D Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown Resistors
D Latch-Up Performance Exceeds 500 mA Per
JESD 17
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A)
SN54LVTH273 . . .
SN54LVTH273 Datasheet
