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SN54LVTH126, SN74LVTH126 3.3ĆV ABT QUADRUPLE BUS BUFFERS
WITH 3ĆSTATE OUTPUTS
SCBS746B − JULY 2000 - REVISED OCTOBER 2003
D Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V VCC)
D Support Unregulated Battery Operation
Down to 2.7 V
D Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
D Ioff and Power-Up 3-State Support Hot
Insertion
D Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown Resistors
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101)
description/ordering information
These bus buffers are designed specifically for low-voltage (3.
SN54LVTH126 Datasheet
