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SN54LS165A - Parallel-Load 8-Bit Shift Registers

Download the SN54LS165A datasheet PDF. This datasheet also covers the SN54165 variant, as both devices belong to the same parallel-load 8-bit shift registers family and are provided as variant models within a single manufacturer datasheet.

Description

The ’165 and ’LS165A are 8-bit serial shift registers that shift the data in the direction of QA toward QH when clocked.

Parallel-in access to each stage is made available by eight individual, direct data inputs that are enabled by a low level at the shift/load (SH/LD) input.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (SN54165-etcTI.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
SN54LS165 8-BIT PARALLEL-TO-SERIAL SHIFT REGISTER Motorola Inc
SN54LS160A BCD DECADE COUNTERS/ 4-BIT BINARY COUNTERS Motorola Inc
SN54LS161A BCD DECADE COUNTERS / 4-BIT BINARY COUNTERS Motorola
SN54LS162A BCD DECADE COUNTERS / 4-BIT BINARY COUNTERS Motorola
SN54LS163A BCD DECADE COUNTERS / 4-BIT BINARY COUNTERS Motorola

Other Datasheets by Texas Instruments

Part Number Description
SN54LS160A SYNCHRONOUS 4-BIT COUNTERS
SN54LS161A SYNCHRONOUS 4-BIT COUNTERS
SN54LS162A SYNCHRONOUS 4-BIT COUNTERS
SN54LS163A SYNCHRONOUS 4-BIT COUNTERS
SN54LS164 8-Bit Parallel-Out Serial Shift Registers

Full PDF Text Transcription

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The SN54165 and SN74165 devices are obsolete and are no longer supplied. SN54165, SN54LS165A, SN74165, SN74LS165A PARALLEL-LOAD 8-BIT SHIFT REGISTERS SDLS062D – OCTOBER 1976 – REVISED FEBRUARY 2002 D Complementary Outputs D Direct Overriding Load (Data) Inputs D Gated Clock Inputs D Parallel-to-Serial Data Conversion TYPE ’165 ’LS165A TYPICAL MAXIMUM CLOCK FREQUENCY 26 MHz 35 MHz TYPICAL POWER DISSIPATION 210 mW 90 mW description The ’165 and ’LS165A are 8-bit serial shift registers that shift the data in the direction of QA toward QH when clocked. Parallel-in access to each stage is made available by eight individual, direct data inputs that are enabled by a low level at the shift/load (SH/LD) input.
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