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SN54CDC586 - 3.3-V PHASE-LOCK-LOOP CLOCK DRIVER

Description

The SN54CDC586 is a high-performance, low-skew, low-jitter clock driver.

It uses a phase-lock loop (PLL) to precisely align, in both frequency and phase, the clock output signals to the clock input (CLKIN) signal.

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SN54CDC586 3.3-V PHASE-LOCK-LOOP CLOCK DRIVER WITH 3-STATE OUPUTS SGBS311A – FEBRUARY 1997 – REVISED JULY 2002 D Low Output Skew for Clock-Distribution and Clock-Generation Applications D Operates at 3.
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