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• Contains Eight Flip-Flops With Single-Rail
Outputs
• Buffered Clock and Direct Clear Inputs • Individual Data Input to Each Flip-Flop • Applications Include:
Buffer/Storage Registers Shift Registers Pattern Generators
description
These monolithic, positive-edge-triggered flipflops utilize TTL circuitry to implement D-type flip-flop logic with a direct clear input.
Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect ar the output.
SN54273 Datasheet
