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• 10KH Compatible
• Open-Collector Outputs Drive Bus Lines or
Buffer Memory Address Registers
• ECL and TTL Control Inputs • Flow-Through Architecture Optimizes PCB
Layout
• Center-Pin VCC, VEE, and GND
Configurations Minimize High-Speed Switching Noise
• Package Options Include “Small Outline”
Packages and Standard Plastic 300-mil DIPs
description
This octal ECL-to-TTL translator is designed to provide efficient translation between a 10KH signal environment and a TTL signal environment. This device is designed specifically to improve the performance and density of ECL-to-TTL CPU/bus oriented functions such as memory address drivers, clock drivers, and busoriented receivers and transmitters while eliminating the need for three-state overlap protection.