Datasheet Details
| Part number | SMV512K32-SP |
|---|---|
| Manufacturer | Texas Instruments |
| File Size | 518.54 KB |
| Description | 16-Mb RADIATION-HARDENED SRAM |
| Datasheet |
 SMV512K32-SP Datasheet
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Description
The SMV512K32 is a high performance asynchronous CMOS SRAM organized as 524,288 words by 32 bits.
It is pin selectable between two modes: master or slave.
The master device selection provides user defined autonomous EDAC scrubbing options.
Features
- 1.
- 20-ns Read, 13.8-ns Write Through Maximum Access Time.
- Functionally Compatible With Commercial 512K x 32 SRAM Devices.
- Built-In EDAC (Error Detection and Correction) to Mitigate Soft Errors.
- Built-In Scrub Engine for Autonomous Correction.
- CMOS Compatible Input and Output Level, Three State Bidirectional Data Bus.
- 3.3 ±0.3-V I/O, 1.8 ±0.15-V CORE.
- Radiation Performance (1).
- Uses Both Substrate Engineering and Radiation H.