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SMJ320C6203
SGUS033A – FEBRUARY 2002 – REVISED MAY 2016
SMJ320C6203 Fixed-Point Digital Signal Processor
1 Features
•1 High-Performance Fixed-Point Digital Signal Processor (DSP) SMJ320C62x™ – 5-ns Instruction Cycle Time – 200-MHz Clock Rate – Eight 32-Bit Instructions/Cycle – 1600 Million Instructions per Second (MIPS)
• 429-Pin Ball Grid Array (BGA) Package (GLP Suffix)
• VelociTI™ Advanced Very-Long-Instruction-Word (VLIW) C62x™ DSP Core – Eight Highly-Independent Functional Units: – Six Arithmetic Logic Units (ALUs) (32-/40Bit) – Two 16-Bit Multipliers (32-Bit Result) – Load-Store Architecture With 32 32-Bit General-Purpose Registers – Instruction Packing Reduces Code Size – All Instructions Cond