OMAPL138B-EP - DSP+ARM Processor

Features

1.
Highlights.
C674x Two Level Cache Memory Architecture.
Dual Core SoC.
32K-Byte L1P Program RAM/Cache.
345-MHz ARM926EJ-S™ RISC MPU.
32K-Byte L1D Data RAM/Cache.
345-MHz C674x Fixed/Floating-Point VLIW.
256K-Byte L2 Unified Mapped RAM/Cache DSP.
Flexible RAM/Cache Partition (L1 and L2).
Supports TI’s Basic Secure Boot.
Enhanced Direct-Memory-Access Controller 3.
Enhanced Dir.

OMAPL138B-EP dsp+arm processor by Texas Instruments - Datasheet Preview

Datasheet Details

Part number	OMAPL138B-EP
Manufacturer	Texas Instruments
File Size	1.76 MB
Description	DSP+ARM Processor
Datasheet	OMAPL138B-EP Datasheet

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Full PDF Text Transcription

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OMAPL138B-EP www.ti.com SPRS815C – DECEMBER 2011 – REVISED APRIL 2013 OMAPL138B C6-Integra™ DSP+ARM® Processor Check for Samples: OMAPL138B-EP 1 OMAPL138B C6-Integra™ DSP+ARM® Processor 1.

Published: Apr 15, 2020 |