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CDCLVC1310 - Ten-Output Low-Jitter Low-Power Clock Buffer and Level Translator

Datasheet Summary

Description

The CDCLVC1310 is a highly versatile, low-jitter, lowpower clock fanout buffer which can distribute to ten low-jitter LVCMOS clock outputs from one of three inputs, whose primary and secondary inputs can feature differential or single-ended signals and crystal input.

Features

  • 1.
  • High-Performance Crystal Buffer With Ultralow Noise Floor of.
  • 169 dBc/Hz.
  • Additive Phase Noise/Jitter Performance Is 25 fsRMS (Typ. ).
  • Level Translation With 3.3-V or 2.5-V Core and 3.3-V, 2.5-V, 1.8-V, or 1.5-V Output Supply.
  • Device inputs consist of primary, secondary, and crystal inputs, and manually selectable (through pins) using the input MUX. The primary and secondary inputs can accept LVPECL, LVDS, HCSL, SSTL or LVCMOS signals and crystal inp.

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Datasheet Details

Part number CDCLVC1310
Manufacturer Texas Instruments
File Size 1.65 MB
Description Ten-Output Low-Jitter Low-Power Clock Buffer and Level Translator
Datasheet download datasheet CDCLVC1310 Datasheet
Additional preview pages of the CDCLVC1310 datasheet.

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Full PDF Text Transcription

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CDCLVC1310 www.ti.com SCAS917E – JULY 2011 – REVISED JANUARY 2014 Ten-Output Low-Jitter Low-Power Clock Buffer and Level Translator Check for Samples: CDCLVC1310 FEATURES 1 • High-Performance Crystal Buffer With Ultralow Noise Floor of –169 dBc/Hz • Additive Phase Noise/Jitter Performance Is 25 fsRMS (Typ.) • Level Translation With 3.3-V or 2.5-V Core and 3.3-V, 2.5-V, 1.8-V, or 1.5-V Output Supply • Device inputs consist of primary, secondary, and crystal inputs, and manually selectable (through pins) using the input MUX. The primary and secondary inputs can accept LVPECL, LVDS, HCSL, SSTL or LVCMOS signals and crystal input.
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