Datasheet4U Logo Datasheet4U.com

CDC391 - 1-Line To 9-Line Clock Driver

Description

The CDC391 contains a clock-driver circuit that distributes one input signal to six outputs with minimum skew for clock distribution.

Through the use of the polarity-control (T/C) inputs, various combinations of true and complementary outputs can be obtained.

📥 Download Datasheet

Datasheet preview – CDC391

Datasheet Details

Part number CDC391
Manufacturer Texas Instruments
File Size 221.41 KB
Description 1-Line To 9-Line Clock Driver
Datasheet download datasheet CDC391 Datasheet
Additional preview pages of the CDC391 datasheet.

📁 Similar Datasheet

  • CDC3207G-C - Automotive Controller (Micronas)
  • CDC3207G-C3 - Automotive Controller (Micronas)
  • CDC3257G-C2 - Automotive Controller (Micronas)
  • CDC-Z137 - FM / AM CD Player (Aiwa)
  • CDC1607F-E - Automotive Controller Specification (Micronas)
  • CDC1631F-E - Automotive Controller (Micronas)
  • CDC4D20 - (CDC4D20 / CDC5D23B) POWER INDUCTORS (Sumida Corporation)
  • CDC5D23B - (CDC4D20 / CDC5D23B) POWER INDUCTORS (Sumida Corporation)
  • CDC7630 - Zero Bias Silicon Schottky Barrier Detector Diodes (Skyworks)
  • CDC7631 - Zero Bias Silicon Schottky Barrier Detector Diodes (Skyworks)
Other Datasheets by Texas Instruments
  • CDC318A - 1-Line To 18-Line Clock Driver
  • CDC319 - 1-Line To 10-Line Clock Driver
  • CDC328A - 1-Line To 6-Line Clock Driver
  • CDC329A - 1-Line To 6-Line Clock Driver
  • CDC337 - Clock Driver
  • CDC339 - Clock Driver
  • CDC340 - 1-Line To 8-Line Clock Driver
  • CDC341 - 1-Line To 8-Line Clock Driver

Full PDF Text Transcription

Click to expand full text
CDC391 1ĆLINE TO 6ĆLINE CLOCK DRIVER WITH SELECTABLE POLARITY AND 3ĆSTATE OUTPUTS SCAS334A − DECEMBER 1992 − REVISED NOVEMBER 1995 D Low Output Skew for Clock-Distribution and Clock-Generation Applications D TTL-Compatible Inputs and Outputs D Distributes One Clock Input to Six Clock Outputs D Polarity Control Selects True or Complementary Outputs D Distributed VCC and GND Pins Reduce Switching Noise D High-Drive Outputs (−48-mA IOH, 48-mA IOL) D State-of-the-Art EPIC-ΙΙB BiCMOS Design Significantly Reduces Power Dissipation D Packaged in Plastic Small-Outline Package D PACKAGE (TOP VIEW) GND 1 1Y2 2 1Y3 3 GND 4 2Y1 5 2Y2 6 GND 7 3Y1 8 16 1Y1 15 1T/C 14 VCC 13 2T/C 12 A 11 VCC 10 3T/C 9 OE description The CDC391 contains a clock-driver circuit that distributes one input signal to six
Published: |