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CD74HC393 - Dual 4-Stage Binary Counter

General Description

Fully Static Operation Buffered Inputs Common Reset Negative-Edge Clocking Fanout (Over Temperature Range) - Standard Outputs 10 LSTTL Loads - Bus Driver Outputs

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Full PDF Text Transcription for CD74HC393 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for CD74HC393. For precise diagrams, and layout, please refer to the original PDF.

Data sheet acquired from Harris Semiconductor SCHS186E September 1997 - Revised August 2003 CD54HC393, CD74HC393, CD54HCT393, CD74HCT393 High-Speed CMOS Logic Dual 4-Stag...

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3, CD74HC393, CD54HCT393, CD74HCT393 High-Speed CMOS Logic Dual 4-Stage Binary Counter [ /Title (CD74 HC393 , CD74 HCT39 3) /Subject (High Speed CMOS Features Description • Fully Static Operation • Buffered Inputs • Common Reset • Negative-Edge Clocking • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -55oC to 125oC • Balanced Propagation Delay and Transition Times • Significant Power Reduction Compared to LSTTL Logic ICs • HC Types - 2V to 6V Operation - High Noise Immunity

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