CD74FCT2952A
description
M PACKAGE (TOP VIEW)
B8 1 B7 2 B6 3 B5 4 B4 5 B3 6 B2 7 B1 8 OEAB 9 CLKAB 10 CLKENAB 11 GND 12
24 VCC 23 A8 22 A7 21 A6 20 A5 19 A4 18 A3 17 A2 16 A1 15 OEBA 14 CLKBA 13 CLKENBA
The CD74FCT2952A is an octal transceiver and register, consisting of two 8-bit, back-to-back registers that store data flowing in both directions between two bidirectional buses. It uses a small-geometry Bi CMOS technology. Data on the A or B bus is stored in the registers on the low-to-high transition of the clock (CLKAB or CLKBA) input if the clock-enable (CLKENAB or CLKENBA) input is low. Taking the output-enable (OEAB or OEBA) input low accesses the data on either port.
This device contains two 8-bit, back-to-back registers that store data flowing in both directions between two bidirectional buses. Each register has separate clock, clock enable, and 3-state output enable signals associated with it.
The output stage is a bination of bipolar and CMOS transistors that limits the output high...
