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Data sheet acquired from Harris Semiconductor SCHS147I
October 1997 - Revised August 2004
CD54/74HC138, CD54/74HCT138, CD54/74HC238, CD54/74HCT238
High-Speed CMOS Logic 3- to 8-Line Decoder/ Demultiplexer Inverting and Noninverting
[ /Title (CD74 HC138 , CD74 HCT13 8, CD74 HC238 , CD74 HCT23 8) /Subject (High Speed
Features
• Select One Of Eight Data Outputs Active Low for 138, Active High for 238
• l/O Port or Memory Selector
• Three Enable Inputs to Simplify Cascading
•
Typical CL = 15
Propagation Delay pF, TA = 25oC
of
13
ns
at
VCC
=
5
V,
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . .