CD54HC175 - Quad D-Type Flip-Flop

advantage of standard CMOS ICs and the ability to drive 10 LSTTL devices.

Information at the D input is transferred to the Q, Q outputs on the positive going edge of the clock pulse.

All four Flip-Flops are controlled by a common clock (CP) and a common reset (MR).

• Common Clock and Asynchronous Reset on Four D-Type Flip-Flops.
• Positive Edge Pulse Triggering.
• Complementary Outputs.
• Buffered Inputs.
• Fanout (Over Temperature Range) - Standard Outputs.
• 10 LSTTL Loads - Bus Driver Outputs.
• . . . 15 LSTTL Loads.
• Wide Operating Temperature Range . . . -55oC to 125oC.
• Balanced Propagation Delay and Transition Times.
• Significant Power Reduction Compare.