Datasheet4U Logo Datasheet4U.com

CD54ACT00F3A - QUADRUPLE 2-INPUT POSITIVE-NAND GATES

This page provides the datasheet information for the CD54ACT00F3A, a member of the CD54ACT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES family.

Description

The ‘ACT00 devices contain four independent 2-input NAND gates.

of Y = A S B or Y = A + B in positive logic.

E Tube CD74ACT00E CD74ACT00E Tube 55°C to 125

📥 Download Datasheet

Datasheet preview – CD54ACT00F3A

Datasheet Details

Part number CD54ACT00F3A
Manufacturer Texas Instruments
File Size 971.00 KB
Description QUADRUPLE 2-INPUT POSITIVE-NAND GATES
Datasheet download datasheet CD54ACT00F3A Datasheet
Additional preview pages of the CD54ACT00F3A datasheet.

📁 Similar Datasheet

  • CD54 - Ind / Wirewound (Sumida)
  • CD54-390LB - Ind / Wirewound (Sumida)
  • CD54-390LC - Ind / Wirewound (Sumida)
  • CD54-470L - 200 mA/ PFM Step-Up Micropower Switching Regulator (ON Semiconductor)
  • CD54-470L - 200 mA/ PFM Step-Up Micropower Switching Regulator (ON)
  • CD54573CS - Tuner Band Switcher (HUAJING)
  • CD54NP-xxx - Ind / Wirewound (Sumida)
  • CD5021GO - (CD5021GO / CD5022GO) CMOS (Semico)
  • CD5022GO - (CD5021GO / CD5022GO) CMOS (Semico)
  • CD5030 - CD/USB Multi-Source Receiver User Manual (ECLIPSE)
Other Datasheets by Texas Instruments

Full PDF Text Transcription

Click to expand full text
CD54ACT00, CD74ACT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES D Inputs Are TTL-Voltage Compatible D Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption D Balanced Propagation Delays D ±24-mA Output Drive Current – Fanout to 15 F Devices D SCR-Latchup-Resistant CMOS Process and Circuit Design D Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015 SCHS308B – JANUARY 2001 – REVISED JUNE 2002 CD54ACT00 . . . F PACKAGE CD74ACT00 . . . E OR M PACKAGE (TOP VIEW) 1A 1 1B 2 1Y 3 2A 4 2B 5 2Y 6 GND 7 14 VCC 13 4B 12 4A 11 4Y 10 3B 9 3A 8 3Y description The ‘ACT00 devices contain four independent 2-input NAND gates. Each gate performs the Boolean function of Y = A S B or Y = A + B in positive logic.
Published: |