74LS126A
description
These bus buffers feature three-state outputs that, when enabled, have the low impedance characteristics of a TTL output with additional drive capability at high logic levels to permit driving heavily loaded bus lines without external pullup resistors. When disabled, both output transistors are turned off, presenting a high-impedance state to the bus so the output will act neither as a significant load nor as a driver. The ’125 and ’LS125A devices’ outputs are disabled when G is high. The ’126 and ’LS126A devices’ outputs are disabled when G is low.
SN54125, SN54126, SN54LS125A, SN54LS126A . . . J OR W PACKAGE SN74125, SN74126 . . . N PACKAGE SN74LS125A, SN74LS126A . . . D, N, OR NS PACKAGE
(TOP VIEW)
1G, 1G- 1 1A 2 1Y 3
2G, 2G- 4 2A 5 2Y 6
GND 7
14 VCC 13 4G, 4G- 12 4A 11 4Y 10 3G, 3G- 9 3A 8 3Y
- G on ’125 and ’LS125A devices; G on 126 and ’LS126A devices
SN54LS125A, SN54LS126A . . . FK PACKAGE (TOP VIEW)
1A 1G, 1G- NC VCC 4G, 4G-
1Y NC 2G, 2G- NC 2A
3 2 1 20...
