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• Inputs Are TTL-Voltage Compatible • Contains Eight D-Type Flip-Flops • Clock Enable Latched to Avoid False
Clocking
• Applications Include:
Buffer/Storage Registers Shift Registers Pattern Generators
• Flow-Through Architecture Optimizes
PCB Layout
• Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
• EPICt (Enhanced-Performance Implanted
CMOS) 1-mm Process
• 500-mA Typical Latch-Up Immunity
at 125°C
• Package Options Include Plastic
Small-Outline Packages, Plastic Shrink Small-Outline Packages and Standard Plastic 300-mil DIPs
74ACT11377 OCTAL DĆTYPE FLIPĆFLOP
WITH CLOCK ENABLE
SCAS129 − D3450, MARCH 1990 − REVISED APRIL 1993
DB, DW OR NT PACKAGE (TOP VIEW)
1Q 2Q 3Q 4Q GND GND GND GND 5Q 6Q 7Q 8Q
1 2 3 4 5 6 7 8 9 10 11 12
24 CLKEN 23 1D 22 2D 21 3D 20 4D
74ACT11377 Datasheet
