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74ACT11157 - Quadruple 2-Line to 1-Line Data Selector/Multiplexer

General Description

This data selector/multiplexer contains inverters and drivers to supply full data selection to the four output gates.

A separate output-enable (OE) input is provided.

A 4-bit word is selected from one of two sources and is routed to the four outputs.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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ą 74ACT11157 QUADRUPLE 2ĆLINE TO 1ĆLINE DATA SELECTOR/MULTIPLEXER ą SCAS180 − D3908, SEPTEMBER 1991 − REVISED APRIL 1993 • Inputs Are TTL-Voltage Compatible • Flow-Through Architecture Optimizes PCB Layout • Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise • EPIC  (Enhanced-Performance Implanted CMOS) 1-µm Process • 500-mA Typical Latch-Up Immunity at 125°C • Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs DW OR N PACKAGE (TOP VIEW) A/B 1Y 2Y GND GND GND GND 3Y 4Y OE 1 2 3 4 5 6 7 8 9 10 20 1A 19 1B 18 2A 17 2B 16 VCC 15 VCC 14 3A 13 3B 12 4A 11 4B description This data selector/multiplexer contains inverters and drivers to supply full data selection to the four output gates.