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74AC11620 OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS062A − JULY 1987 − REVISED APRIL 1993
• Flow-Through Architecture Optimizes PCB
Layout
• Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
• EPIC (Enhanced-Performance Implanted
CMOS) 1-µm Process
• 500-mA Typical Latch-Up Immunity at
125°C
• Package Options Include Plastic
Small-Outline Packages, and Standard Plastic 300-mil DIPs
description
This octal bus transceiver is designed for asynchronous communication between data buses. The control function implementation allows for maximum flexibility in timing.
74AC11620 Datasheet
