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74AC11175 - QUADRUPLE D-TYPE FLIP-FLOPS

Description

These positive-edge-triggered flipflops implement D-type flip-flop logic with a direct clear input.

Information at the D inputs that meets the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse.

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Full PDF Text Transcription

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• Applications Include: Buffer/Storage Registers, Shift Registers, Pattern Generators • Flow-Through Architecture Optimizes PCB Layout • Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise t• EPIC (Enhanced-Performance Implanted CMOS) 1-mm Process • 500-mA Typical Latch-Up Immunity at 125°C • Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs description These positive-edge-triggered flipflops implement D-type flip-flop logic with a direct clear input. Information at the D inputs that meets the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse.
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