CLA80000 - High Density CMOS Gate Arrays

Product Overview

Zarlink Semiconductor

Part number	CLA80000
Manufacturer	Zarlink Semiconductor
File Size	440.92 KB
Description	High Density CMOS Gate Arrays
Datasheet	CLA80000 Datasheet
Additional preview pages of the CLA80000 datasheet.

I I I I I I I I I I 0.7µ (0.8µ drawn) process Typical gate delay 210ps Accurate simulation delay (multi platform support) Support for industry standard workstations Comprehensive cell library 3V option for low power operation Split rail operation (optional 5V I/O, 3V core logic) Low skew clock distribution strategy Power and ground distribution grids Extensive range of package options.

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Published: Apr 24, 2006 |